1. Field of Invention
The present invention relates to a spread spectrum clock generator (SSCG). More particularly, the present invention relates to an offset controllable spread spectrum clock generator apparatus.
2. Description of Related Art
In an electronic circuit, a spread spectrum clock generator apparatus is usually used to disperse the frequency of the signal, to prevent the energy of the signal from concentrating on one frequency. An offset exists between the original clock at the input of the conventional SSCG and the center of the spread spectrum clock at the output end of the conventional SSCG. FIG. 1 is a block view of a conventional spread spectrum clock generator apparatus. FIG. 2 is a signal timing view of the spread spectrum clock generator apparatus. Referring to FIGS. 1 and 2, in general, the SSCG 100 includes a phase/frequency detector 110. A feedback path is connected to the input end of the phase/frequency detector 110 from the output end of the SSCG 100, while the other input end of the phase/frequency detector 110 receives the original clock signal. The phase/frequency detector 110 makes a determination according to the phase relationship between the input original clock signal and the spread spectrum clock signal, and sends out a phase correction signal. The SSCG 100 spreads the received original clock signal according to the phase correction signal, and sends out the spread spectrum clock signal from its output end. Therefore, each time a different phase difference exists between the rising edges of the original clock signal and the spread spectrum clock signal. For example, in FIG. 2, a phase difference φ(n) exists between the rising edges of the nth original clock and the nth spread spectrum clock, while a phase difference φ(n+1) exists between the rising edges of the (n+1)th original clock and the (n+1)th spread spectrum clock. Both of the above-mentioned nth and (n+1)th spread spectrum clocks lag behind the corresponding original clocks.
Because the SSCG 100 has the spectrum spreading function, the timing position of the rising edge of the spread spectrum clock signal varies with time. The timing position of the rising edge of the spread spectrum clock signal output by the SSCG 100 varies in the spreading range SR. The φdmax in FIG. 2 represents the largest phase difference of the rising edge of the spread spectrum clock lagging behind the rising edge of the original clock, while φdmax represents the largest phase difference of the rising edge of the spread spectrum clock leading the rising edge of the original clock. Moreover, CP in FIG. 2 represents the average center position of the spreading range SR.
The φoffset (phase offset) is the time difference between the rising edge of the original clock and the average center position CP of the spread spectrum clock range SR. For the conventional SSCG 100, the offset φoffset can be regarded as a fixed value after the circuit is activated, but it cannot be controlled at will. Different applications require different offsets φoffset (for example, 0) of the spread spectrum clock signal. Under the circumstance of different modulating frequencies or spread spectrum amplitudes, the offset φoffset cannot be set to a desired predetermined value in the conventional technology. Therefore, a spread spectrum clock generator apparatus capable of controlling the offset φoffset is desired.